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MICRON - PC28F064M29EWHA - M29EW 32Mb,64Mb,128Mb: 3V Embedded Parallel NOR FLASH, US $74 – Picture 0
MICRON - PC28F064M29EWHA - M29EW 32Mb,64Mb,128Mb: 3V Embedded Parallel NOR FLASH, US $74 – Picture 0

Micron - Pc28f064m29ewha - M29ew 32mb,64mb,128mb: 3v Embedded Parallel Nor Flash

US $74

  • Ottawa, Ontario, Canada
  • Nov 12th
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MICRON - PC28F064M29EWHA - M29EW 32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash, NEW Features Supply voltage VCC = 2.7–3.6V (program, erase, read) VCCQ = 1.65–3.6V (I/O buffers) Asynchronous random or page read Page size: 8 words or 16 bytes Page access: 25ns Random access (VCCQ = 2.7–3.6V): 60ns (BGA); 70ns (TSOP) Buffer program: 256-word MAX program buffer Program time 0.56µs per byte (1.8 MB/s TYP when using 256-word buffer size in buffer program without VPPH) 0.31µs per byte (3.2 MB/s TYP when using 256-word buffer size in buffer program with VPPH) Memory organization 32Mb: 64 main blocks, 64KB each, or eight 8KB boot blocks (top or bottom) and 63 main blocks, 64KB each 64Mb: 128 main blocks, 64KB each, or eight 8KB boot blocks (top or bottom) and 127 main blocks, 64 KB each 128Mb: 128 main blocks, 128KB each Program/erase controller Embedded byte/word program algorithms Program/erase suspend and resume capability READ operation on another block during a PROGRAM SUSPEND operation READ or PROGRAM operation on one block during an ERASE SUSPEND operation on another block BLANK CHECK operation to verify an erased block Unlock bypass, block erase, chip erase, and write to buffer capability Fast buffered/batch programming Fast block and chip erase VPP/WP# pin protection VPPH voltage on VPP to accelerate programming performance Protects highest/lowest block (H/L uniform) or top/bottom two blocks (T/B boot) Software protection Volatile protection Nonvolatile protection Password protection Password access Extended memory block 128-word (256-byte) block for permanent secure identification Program or lock implemented at the factory or by the customer Low-power consumption: Standby mode JESD47H-compliant 100,000 minimum ERASE cycles per block Data retention: 20 years (TYP) 65nm single-bit cell process technology Packages (JEDEC-standard) 56-pin TSOP (128Mb, 64Mb) 48-pin TSOP (64Mb, 32Mb) 64-ball FBGA (128Mb, 64Mb) 48-ball BGA (64Mb, 32Mb) Green packages available RoHS-compliant Halogen-free Operating temperature Ambient: –40°C to +85°C PRICE IS FOR 1.

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