Xilinx Gpio / Hdmi Breakout Daughter Board

US $420

  • Jerusalem, default, Israel
  • Jun 9th
GPIO / HDMI breakout daughterboard for Xilinx KC705 FPGA developer board (should fit other Xilinx evaluation boards, such as the KCU105 - should be verified for the specific board!) The board connects to the low pin-count (LPC) Samtec FMC connector and provides: 25 GPIO Pins Pins are broken-out through a 2.54" male header. Most pins are LVDS pairs. In addition there are two pins serving for I2C communication, 3.3v supply and ground. Many possible applications, e.g., controlling units, sensing, communication (sending/receiving files to/from FPGA). HDMI Connector  This is an FPGA fabric-driven interface (no video controller on the borad). Can hence act both as input and output. Concise reference designs can be found at the Hamsterworks wiki (hamsterworks.co.nz) under FPGA projects (miniSpartan6+ DVID Output is a good example). The connector connects to four LVDS channels (R,G,B and clock) with protection diodes, EDID is not connected (not an issue when the transmission capabilities are known). Hot plug can be asserted via an onboard jumper (or connected to one of the IO pins). 7 User-Controlled Leds The leds are switched by power mosfets. They are not pulled up or down (hence undefined until they are set by the fabric).  Additional Info: The PCB connects through the low pin-count Samtec ASP-134604-01 FMC connector. The PCB size is 6.5cm by 6.8cm and thickness is 1.6mm. It has four screw holes (two of which specifically placed for the Xilinx board). Screws, spacers and washers are included. The constraints file: # GPIO NET "lpc_gpio<0>  "LOC="AJ26" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<1>  "LOC="AD24" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<2>  "LOC="AC24" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<3>  "LOC="AF25" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<4>  "LOC="AE25" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<5>  "LOC="AH25" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<6>  "LOC="AG25" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<7>  "LOC="AJ21" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<8>  "LOC="AH21" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<9>  "LOC="AF21" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<10> "LOC="AF20" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<11> "LOC="AH22" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<12> "LOC="AK23" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<13> "LOC="AK24" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<14> "LOC="AB24" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<15> "LOC="AC25" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<16> "LOC="AB27" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<17> "LOC="AC27" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<18> "LOC="AH26" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<19> "LOC="AH27" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<20> "LOC="AK29" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<21> "LOC="AK30" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<22> "LOC="AJ28" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<23> "LOC="AJ29" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<24> "LOC="AC29" | IOSTANDARD=LVCMOS25 ; NET "lpc_gpio<25> "LOC="AC30" | IOSTANDARD=LVCMOS25 ; # LEDS NET "lpc_led<0> "LOC="AK20" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<1> "LOC="AK21" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<2> "LOC="AJ24" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<3> "LOC="AK25" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<4> "LOC="AD21" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<5> "LOC="AE21" | IOSTANDARD=LVCMOS25 ; NET "lpc_led<6> "LOC="AD27" | IOSTANDARD=LVCMOS25 ; # HDMI (ordered: TX0P,TX0N,TX1P,TX1N,TX2P,TX2N,TXCP,TXCN) NET "lpc_hdmi<0> "LOC="AE30" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<1> "LOC="AF30" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<2> "LOC="AB29" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<3> "LOC="AB30" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<4> "LOC="Y30"  | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<5> "LOC="AA30" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<6> "LOC="AG30" | IOSTANDARD=LVCMOS25 ; NET "lpc_hdmi<7> "LOC="AH30" | IOSTANDARD=LVCMOS25 ;

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